Objective of the project was to make a LAB Apparatus which would give the students of third Year Electrical Engineering a better understanding of Analog to Digital conversion in general, with a deep insight into the operation of Successive Approximation Technique Analog to Digital Converter.
Due to the reason that it was to be used as a LAB Apparatus, we had to make the outlook of the project as an instrument. Two analog Voltmeters are an indication of that. Large display is used to make it easy for the student to take readings. Binary output provides another way of interpreting the result.
The students will have to observe the step by step process of conversion, calculate the digital equivalent, and then calculate the QUANTIZATION NOISE.
We have worked, under the direction of Dr. Muhammad Jahangir Ikram, to make it work and look like an Instrument of international standards. Though due to financial and technical restraints we could not achieve that but the users and the teaching faculty still approved it.

For the past twenty years or so, due to the rapid growth of semiconductor technology, more and more emphasis is being laid on digital systems because of their relative advantages over analog systems. Not only are digital systems more immune to noise and distortion, they are also more economical than analog systems and increasing the number of bits in the system can increase precision simply. Analog to Digital conversion of a signal is the first step towards transformation of a system from continuous domain to discrete domain.

Needless to say, almost all information that we generate or perceive is inherently analog in nature. Processing and Transmission of this information signal in analog form has certain drawbacks in terms of distortion and interference over a transmission medium and the introduction of both external as well as internal noise. Digital systems do not suffer from this drawback and are hence ideally suited for information processing. But, until recently, digital systems required costly systems and large bandwidths. Nowadays, these hassles are no longer there except in the most high-speed systems. Technology barrier for audio systems has almost entirely been removed, and soon, with the introduction of HDTV, all video signals would be digital as well.

All A/D converters are hybrids of analog and digital systems, and essentially all employ compurgator and counter circuits. They all return a number in binary form that is directly proportional to the input analog voltage.

Digital output = k x Analog Input

When the input is zero, the output is zero and it is some number for a reference voltage, either applied separately or integrated in the circuitry of the A/D converter.
We now describe some of the most common A/D conversion Techniques. The one that we have used will be described in the end.
There are basically five A/D Conversion Techniques.

Single Slope A/D converters employ a ramp generator whose output increases linearly with time. This ramp voltage is applied to one of the inputs of a voltage comparator whose other input is connected to the input analog voltage to be digitized. The output of the comparator controls a counter circuit, which counts clock pulses of a certain frequency. The comparator continuously compares the two voltages (the input voltage and the ramp voltage generated by the A/D converter) and outputs an enable signal for the counter as long as the input voltage is greater than the voltage of the ramp generator. As soon as the ramp voltage rises above the input voltage, the comparator generates a disable signal for the counter, which immediately stops counting. The count on the counter is a measure of the time required for the disable signal to appear. Since the count is a measure of time, the final count represents the time required for the ramp voltage to increase from zero & reach a voltage level equal to the input voltage. The higher the input voltage, the longer will be the duration of the enable signal and larger will be the count on the counter.

Dual Slope converters have essentially the same principle as a single slope converter. Here, the input voltage controls the slope of the ramp generator. The ramp rises with a slope proportional to the input voltage. The circuitry is such that after a fixed time t0, the ramp generator stops generating this positive ramp & generates a negative ramp of a fixed slope. The output of the ramp generator drops from what ever maximum voltage level reached at the end of the positive ramp towards zero linearly at a rate that is independent of the input voltage. Right from the start of the positive ramp generation process, a counter measures the time interval like in Single slope converter and stops as soon as the output of the ramp generator drops to zero. The output count is a measure of the total time required for the process. The time t0 is fixed. The time required for the voltage level to drop to zero depends on the final voltage level reached at the end of the positive ramp generation cycle, which in turn depends on the slope of the ramp, and hence the input voltage. The total count therefore is a linear function of the input voltage. This approach is shown graphically below.

These are the fastest types of A/D converters. No counting process is performed, instead a number of digital levels are already fixed in the circuitry and they are compared with the input voltage. A logic circuit analyses the output of the comparator circuits and determines which digital voltage level is closest to the input voltage. Since no counting or ramp generation is involved, the time required for conversion is very small.
Flash converter circuits require a very large number of comparators. An n-bit flash converter requires 2^n - 1 comparators and the logic circuitry will have 2^n -1 inputs and n outputs. For an 8-bit system, 255 comparators will be required and the logic circuitry will have 255 inputs and 8 outputs. Due to this complexity, Flash converters are very expensive.
A more common approach is to use the half-flash technique. For an 8-bit system, two 4-bit flash converters are connected, one for the upper 4-bits and one for the lower four bits. One converter generates the MSB, the output of which is D/A converted and subtracted from Vin and fed into the other converter which generates lower 4 bits. This system requires 30 comparators compared to 255 for a full-flash system.

Staircase A/D converters employ almost the same technique as single slope A/D converters. The major difference is that they do not have any ramp generator mechanisms. Instead, as we shall see, they have a staircase type of ramp that is generated due to its circuitry.
The principle of operation is very simple. The A/D converter has a voltage incrementer circuit whose output is incremented by a small amount every clock cycle. This voltage converter has known Digital values. As soon as the generated voltage just becomes greater than the input voltage, the incrementing process is halted and the digital value corresponding to the generated voltage becomes the output. The following flowchart shows this process.

The following graph shows the V generated voltage as a function of time together with the input voltage.

Circuit Blocks.

A simple monostable multivibrator using a 555 timer IC constitutes the clock IC. Generally, the accuracy of A/D converters do not depend on the timing accuracy or the duty cycle of the clock pulse used since the time interval is not measured in staircase converters (in case of Single Slope and Dual Slope converters, accuracy does depend on the stability of the clock frequency). In case of Successive approximation converters, only the number of pulses matters, not their frequency because their number is what is counted and converted. Therefore there is no need for a highly stable crystal clock circuit and a 555 timer IC provides sufficient rise time and fall time for proper triggering of digital counter IC’s.
We have used the IC in a monostable mode i.e. when a trigger pulse is applied it triggers the IC, which gives a pulse of fixed duration, triggering the circuit.
The figure below shows the circuitry used to construct the clock. Note that although the accuracy of the converter does not depend on the frequency or the duty-cycle, the conversion time does depend on the clock frequency used. Higher the frequency, smaller would be the conversion time. Generally speaking, all types of converters complete a conversion within a specified number of clock cycles. Using a clock of higher frequency can therefore speed up the conversion process. High frequency clocks have other disadvantages like the rise & fall time might not be fast enough for proper triggering of the counter circuits etc. Most counters IC’s available commercially can operate with a few MHz, the 74HC and 74HCT series can operate at clock frequency of up to 50MHz. A 555 timer can produce a stable clock pulse of up to 500kHz (manufacturers designated preferred upper limit of operation). An 8-bit Successive approximation would require a maximum of 8 clock cycles for a conversion process to complete. Hence the maximum conversion rate achievable with the circuitry used is roughly 62500 conversions per second, this is what usually required by most audio systems, but more than enough for typical data acquisition applications.

A single chip, CD4017 of 10 bit CMOS binary counter and Decoder is used. This counter has added feature of counts enable, Master reset, clock inhibit and carryout. Presets are used to reset the whole system and hence the preset enable pin is connected to count 10 and Master Reset of the circuit using an OR gates. This is a CMOS IC and can operate up to 13.8MHz.

OR – GATES AND LATCHES.

The output of the counter and the comparetor are checked in the OR-Gates. The output of the OR-Gate is latched. The Latched data is then available for the display. The OR-Gate is 74LS32, which are a very common MSI chip, and the LATCH is 74LS175. It is 4- Bit bistable latch, with two enable inputs. We needed a latch with independent enable pins; therefore we could only use 2 – Bits out of 4 available.

BUFFER 74LS241.

THE COMPARATOR:

In the above circuit, if V (generated) is less than Vin, output at Enable/CC is low and as V (generated) just becomes greater than Vin, the output goes high.

DIGITAL TO ANALOG CONVERTER:

HEXADECIMAL DISPLAY UNIT.

ANALOG VOLTMETERS.

PCB Design.

1. During the research part of the project, we faced difficulty in obtaining a circuit, in which we were helped out by Dr. Muhammad Jahangir Ikram, the project Advisor.
2. Getting a level triggered JK flip-flop proved to be impossible. The result was that we shifted to LATCH, which had it’s own problems. It was a 4-Bit LATCH with 2-Enable only. We needed independent Enable system. This was over come by using 4 LATCHES instead of two.
3. Above all we had to display our result in DECIMAL form, from the binary output. This also proved to be impossible for us, though now when we think of it, it was not that difficult. We could have used EPROM, Micro Controllers or EEPROM.
4. PCB did make us very uncomfortable, getting the software, learning it, and then finding out that it cannot help you is not very soothing.
5. Soldering the double-sided PCB was not an easy job either. Due to the reason that connections were present on both the sides, IC socket use was difficult.
6. Analog voltmeter was a headache. They made us go to the places where we nervier would have gone, PURANI ANARKALI, BRANDERTH Rd. etc.
7. The biggest problem was of the finance. We had to buy the basic hardware for the electronics work, e.g. Solder Iron, Digital Multi meter, Breadboard, etc.

Helped by:

Layout.

COST OF THE PROJECT.